Come learn about the extensive software ecosystem available to help you more efficiently develop your next AMD-based project. Reduce your time to market by understanding the many solutions AMD’s software partners offer.

Join us to learn why creating a virtual representation of your target system with Simics can accelerate your product development lifecycle, reduce costs, and improve product quality. Simics is capable of simulating any target hardware system running any target software stack (including non-Wind River operating systems). Learn how Simics can help you: evaluate target architecture choices without building physical prototypes; bring-up hardware before the target physically exists; improve collaboration among engineering groups; integrate and test the system before hardware physically exists; find the source of a bug by traveling back in time to the moment that things went wrong; and peer into and control any system device to inject faults and test device drivers.

Hardware-in-the-loop (HIL) simulation enables developers to achieve a highly realistic simulation of equipment in an operational virtual environment using real hardware. Simulating real-world and extreme conditions without actual risk minimizes costs and facilitates shorter time-to-market. Learn how physical systems can be modeled in software and see first-hand how various commercial and government organizations are utilizing HIL testing. We’ll discuss critical HIL components including a real-time operating system; real-time software tools; and a Simulation Executive for controlling the cycling of models involved in the testing. Desirable features of an OS capable of hosting a real-time simulation will also be reviewed along with software tools required to develop and run these simulations. We’ll conclude with in-depth discussions on a software product that can serve as an executive for models, both hand written or created in Matlab/Simulink; a convenient interface between software models and their related I/O; and a GUI interface for visualization and model control.

Covering technical methodologies and techniques for developing critical software in compliance with DO-178B/C, IEC 61508, CENELEC, ISO 26262 and FDA guidelines we will highlight the processes, procedures and tools used to achieve critical software certification. Using practical examples, we'll remove the mystery and confusion surrounding embedded systems development, lifecycle traceability, verification, reporting and quality assurance. We will pay special attention to requirements traceability, coding standards adherence, independent verification, testing and structural coverage analysis. Finally, we'll discuss how these capabilities are used in achieving the next generation of certification.

Did you know that PCIe over cable offers greater performance at less cost than other interconnect solutions? Learn how you can use this powerful functionality in both I/O expansion applications as well as in networking applications to give your products greater performance at less cost. One Stop Systems will demonstrate the products that are available today as well as discuss some of the new products being designed that will provide even greater performance. Every design engineer needs to understand this option and should not miss this opportunity to learn more about the advantages of using PCIe over cable.

This hands-on training will provide an overview of coreboot, and how to build and debug a coreboot ROM image for an AMD x86 processor based board. Participants will have an opportunity to use Sage SmartProbe and EDK to build a coreboot rom image for an AMD G-Series APU, flash the ROM device then debug and correct errors. After completing the session, attendees will have a basic understanding of how coreboot is structured, and the process by which they could implement it on their products.

With the current spotlight on static analysis for embedded and safety-critical development, it's important to remember that static analysis is just one piece of the quality and compliance puzzle. The best way to achieve the expected results (and compliance) with static analysis is to deploy it within in a solid, repeatable quality process that is visible, measurable, and—most importantly—improvable. Many organizations have achieved sustainable success with static analysis by adopting a policy-driven approach for continually and objectively measuring compliance with management’s expectations throughout the SDLC. Building on the foundation of static analysis, this extends to a comprehensive quality process that spans across software test and analysis, to quality planning, to requirements traceability, to change management. This session will explore: the role of static analysis in key industry guidelines (mil/aero, automotive, medical, etc.); how to effectively use different flavors of static analysis in concert; why a policy-driven approach is essential; how to evolve your existing process into a policy-driven one; how to apply proven methods for achieving sustainable success with static analysis; and how to move beyond static analysis with unit testing, coverage, requirements traceability, and more.

PCI and PCI Express combine both low cost and high performance for system developers seeking performance and compatibility. We provide a range of products enabling system architects and developers to take advantage of PCI and PCI Express’ low latency and high bandwidth for real time applications including simulators, replicated memory, and multi-processor systems. Based on your performance needs PCI, PCI Express Gen1 or Gen2, see our complete high performance interconnect solution including software and hardware. Find out how to maintain your existing software infrastructure but take advantage of the cost and performance benefits of PCI and PCI Express with our SuperSockets and SISCI software API’s.

This hands-on training will provide an overview of coreboot, and how to build and debug a coreboot ROM image for an AMD x86 processor based board. Participants will have an opportunity to use Sage SmartProbe and EDK to build a coreboot rom image for an AMD G-Series APU, flash the ROM device then debug and correct errors. After completing the session, attendees will have a basic understanding of how coreboot is structured, and the process by which they could implement it on their products.

We will introduce the Qt Commercial cross-platform UI and application framework for embedded device UI and application creation. It will explore how developers can use the rich Qt Commercial C++ library and the Qt Creator IDE to build advanced cross-platform applications and UIs with less lines of code. In this presentation, attendees will be informed of the latest development of Qt Commercial for Embedded Linux, Windows Embedded and RTOS to meet future needs. We provide a summary of activities around Qt Commercial in embedded environments, as well as guidance to OS selection and typical HW configurations needed for various projects. We’ll show the development tool in action and demonstrate how to efficiently develop an easy-to-use embedded UI. We will also cover how our cross-platform capabilities protect investments as it is possible to write the same application once and deploy it on different types of hardware and OS targets.

There are many strategies a project can take to test their embedded software applications. These include code coverage analysis, full unit testing, and static code analysis. Ideally, most organizations would like a repeatable regression testing process that is easy to implement and has a measurable impact on product quality. But how do you get there? Find out exactly as we explore the various ways companies from a wide range of industries combine various testing approaches to improve overall product quality and test repeatability.