Come and learn about the new APU (accelerated processing unit) architecture and how it can be leveraged to help you deliver innovative low-power and value-oriented solutions for a variety of embedded applications.

Development teams fight the project triangle. Software can be high quality, on time or on budget—pick any two. With continued pressure to improve time to market and reduce costs, quality has frequently taken a back seat. And now, the triangle is more challenging with the increased need for security. Customers are demanding that software be assessed on quality, security, timelines and budgets. What can be done? We will look at ways to bring relief to the industries with the greatest quality and security challenges—aerospace, automotive, medical, military and security. Using industry standards DO-178B, IEC 61508, IEC 62304 & ISO 26262 as a reference, we look at how best practices within these standards help meet software quality and security objectives. Then to relieve the project triangle pressure, we'll discuss how tools automate best practices from requirements engineering, requirement traceability through code design, static code analysis, code verification, unit/integration testing and certification or standard compliance. With a streamlined software development process, developers can deliver software quality and security while meeting project time and budget constraints.

Algorithm and systems design engineers use Simulink for modeling real-time controls applications, and look to implement these algorithms in DSPs and FPGAs. For FPGA design, systems designers need to consider issues related to fixed-point modeling, area-speed-power trade-offs, verifying HDL code, and selecting the right FPGA. In this talk, we will describe an automated workflow that addresses these topics and significantly reduces FPGA design cycle time.

In this seminar you will get a solid overview of how to navigate the VITA 65 OpenVPX specification. We will cover how to derive a set of backplane requirements starting with the Modules Profile and working up the Backplane Profile. Convection (Air), Conduction and Liquid Thermal Management Systems as they apply to OpenVPX Chassis and ATR will also be covered.

Learn how to take advantage of OpenVPX for FPGA-based software radio and high speed data acquisition systems. Learn tips for selecting OpenVPX modules, backplanes and switches and strategies for matching FPGA gigabit serial links to system requirements, including packaging, power utilization and cooling. Deployable beamforming, radar and communications systems will also be shown.

Software in critical embedded applications must operate safely and reliably. Testing and verification processes must eliminate severe defects that could cause a safety hazard. However, testing can only show the presence of defects, but not their absence. If testing cannot show the absence of defects, how can engineers be confident they have tested the software sufficiently or have any idea how many errors could still remain? Engineers are turning to formal methods based abstract interpretation to solve this dilemma. Using static code analysis with abstract interpretation, it is possible to prove the absence of specific run-time errors in source code. By using these techniques software teams are able to quantify where code may or may not fail. Using deterministic metrics, engineers are able measurably improve the quality of their software. Learn how you can use these techniques to the development of critical embedded applications when software reliability is at stake.

Join us as we illustrate the unparalleled DSP processing capabilities of our WILDSTAR-Virtex-6 FPGA platforms and CoreFire FPGA Development Suite. As FPGA processing continues to scale, high-speed analog and digital interfaces must also scale to provide sufficient data bandwidths to/from the FPGAs and development tools must provide enhanced productivity that enables designers to leverage the full performance of current- and next-generation FPGA products with reasonable turnaround. See how you can leverage Virtex-6 platforms and integrated FPGA development tools in the design of a 512-Million Point Real FFT operating on RF data digitized at 1200MSps, 8-bit, and utilizing only one PCIe slot!

New technologies are now available to further invigorate the embedded industry. Come learn about how heterogeneous computing and GPGPU combined with enterprise-class and low-power processing enable you to develop cutting-edge solutions for a variety of embedded applications.

We will provide a new look at 3U VPX Systems, as well as the new Small Form Factor VITA 74 “Nano-ATR” Systems. Find out the similarities between Nano-ATR and 3U VPX, including their identical bus topologies and electronic signaling. We'll also have a discussion on the thermal design of both the 3U VPX and VITA 74 “Nano-ATR” conduction cooled modules and systems. Actual hardware will be shown.

Using the Model-Based design approach, we will demonstrate how to efficiently develop, test, validate and communicate real-time control algorithms using Statecharts, without acquiring development tool chains, building devices drivers, or board support packages (BSPs). We’ll discuss how to test these algorithms in simulation, and automatically generate code to integrate with the rest of your system. We will also show how to deploy your algorithms to a real-time system embedded system using an x86 compatible prototyping platform to control your hardware. Lastly, we will demonstrate how these algorithms may retarget into an embedded production environment.

PCI and PCI Express combine both low cost and high performance for system developers seeking performance and compatibility. We provide a range of products enabling system architects and developers to take advantage of PCI and PCI Express’ low latency and high bandwidth for real time applications including simulators, replicated memory, and multi-processor systems. Based on your performance needs PCI, PCI Express Gen1 or Gen2, see our complete high performance interconnect solution including software and hardware. Find out how to maintain your existing software infrastructure but take advantage of the cost and performance benefits of PCI and PCI Express with our SuperSockets and SISCI software API’s.

The latest multi-core based hardware platforms offer significant potential to boost software performance. Most legacy applications in these domains are often written for a single core and cannot leverage the parallelism inherent in multi-core and multi-processor systems without extensive refactoring and reprogramming, unless they utilize frameworks specifically designed to bridge the gap between sequential and parallel programming. The Embedded Microprocessor Benchmark Consortium’s Networking v2.0 Suite is a single-threaded benchmark that runs code commonly used in network applications delivering realistically large data sets and transactions. This presentation describes the fundamentals of the framework we used and the decisions we made to enable this benchmarking suite to be able to run on a variable number of threads efficiently. We used the example of testing and evaluating these code changes on a dual processor, sixteen core x86 platform.

Join us to learn how combining the established PICMG 3.1 Ethernet ATCA architecture, Intel® Xeon processors and the latest high performance 40Gb Quad Data Rate (QDR) InfiniBand scalable interconnect on the same platform delivers an affordable, deployable and sustainable HPEC solution. Integrating these technologies provides the high performance, low power, low latency and high bandwidth required for deployed mobile platforms. Compliance with standards offers support for long term product life cycle management and enables technology refresh without modification to the chassis, rack or power distribution.

To obtain maximum performance of an embedded system while keeping its size, weight and cost within reasonable targets requires careful thermal management consideration at early stage of the design. We will discuss different cooling methods via the three modes of heat transfer (conduction, convection and radiation), how to calculate heat sink performance required for the IC and will compare different heat sink attachment methods.

Join us to learn how PCI Express 2.0 and the recently adopted PCIe 3.0 industry standard transforms the future of High Performance Computing as well as high-speed networking, imaging, data recording and slot expansion at a fraction of the cost of legacy standards. Discover how these easily accessible and available products can be implemented in your application for higher productivity at lower costs. See how PCIe networks can reach speeds of 160 Gbps and make TFLOPS of data processing power available to the HPC, datacenter, military, imaging, instrumentation and storage applications.

Technology changes and innovations are putting increasing demands and expectations on embedded database management. This session walks you through technical and commercial considerations to address when your software development project needs a commercial grade database management solution. Learn how to develop your selection criteria so that you can choose the database management option best suited to your project. Topics include; what is database management; what are typical requirements in an embedded application; and taking a glance into architecture, operation, and project management.