Today’s industrial and military customers are demanding computer systems that can operate in a wider array of applications than traditional industrial and commercial products were designed to survive. This requirement includes not only the need for extended operating temperatures but also the ability to survive in high shock and vibration environments. At the same time, many of the systems used in these projects have been reduced to a CPU board and specialized I/O. This simplification is leading system designers to seek alternatives to the expensive infrastructure of VME and cPCI based systems. To meet their needs, engineers are looking at the new generation of INDUSTRIAL PCs. Come join us as we tear down an INDUSTRIAL PC and see how they are designed to handle the stress of shock and vibration, all the while maintaining their cool. We will discuss a wide range of potential applications and questions that you should consider when selecting an INDUSTRIAL PC for your project.

Debugging Embedded Linux is typically a two-pronged approach, accomplished by using JTAG tools (or KGDB) in Supervisory space and GDB in User space. This is fine and well for problems that are synchronous and repeatable. However, for system-level problems that involve asynchronous interactions between the two spaces, integrating the two debug paradigms is desirable. This session will discuss techniques that allow you to control both the User Space and Kernel Space within the same debug environment. Also, methods for using ARM ETM Trace data, correlated to the source code in both the Supervisor and User space, will be shown. The presentation will include a live demonstration using a Mistral Evaluation Module with a TI OMAP3530 processor.

Connectivity is the rule, not the exception anymore, for modern embedded devices. In fact, devices already outnumber workstations on the Internet by about five to one, and the gap is growing fast. Lately, sophisticated attacks that evolved on PCs - and became more virulent on the Internet - are being re-targeted towards the comparatively defenseless "Internet of Things." But it's really difficult to apply old security paradigms to the modern embedded device ecosystem. How should we, as device designers, approach the security problem?

Using the Model-Based design approach, we will demonstrate how to efficiently develop, test, validate and communicate real-time control algorithms using Statecharts, without acquiring development tool chains, building devices drivers, or board support packages (BSPs). We’ll discuss how to test these algorithms in simulation, and automatically generate code to integrate with the rest of your system. We will also show how to deploy your algorithms to a real-time system embedded system using an x86 compatible prototyping platform to control your hardware. Lastly, we will demonstrate how these algorithms may retarget into an embedded production environment.

Join Green Hills Software for an informative session that will cover development challenges associated with adopting multicore processors in new designs. We’ll cover common use cases for multicore devices as well as a complete multicore toolkit that includes development tools, operating systems, and virtualization technology. Utilizing this toolkit enables developers to unlock the power of next generation multicore designs.

OpenVPX introduces a descriptive nomenclature based upon Module Profiles, Slot Profiles, Backplane Profiles and Chassis Profiles. This session will introduce these terms and show how they simplify the specification of OpenVPX systems and help module manufacturers ensure interoperability. These terms are as useful for custom systems as they are for standard OpenVPX development systems.

For all interest levels, this is an introduction to Windows Embedded 7 - you will become familiar with the technology, tools, and resources. As a follow-on to this session, we offer a Training Lab: Jumpstart Your Windows Embedded Standard 7 Development, from 10:15 am - 12:15 pm and invite you to join us.

We will introduce the Polyspace code verification tool for achieving robust software quality. Learn about a unique formal-method approach called 'abstract interpretation' - which makes it possible to find errors that other techniques can miss. Through demonstrations and examples, we will show how it helps detect errors in embedded C/C++/Ada code and prove that the software contains no run-time errors. You will find this valuable if you: work with critical C, C++ or Ada code; rely on dynamic testing, coverage and code reviews to find runtime errors; would like a way to prove that no more runtime errors remain in your code; seek qualification or certification under DO-178B, ISO 26262, IEC 61508, EN 50128.

Developing controls for real-time embedded systems requires extensive embedded software expertise for hand-coding applications, creating BSPs, and deploying an RTOS from an IDE. By utilizing System-on-Module (SOM) technology and combining the Model-Based Design approach with a turn-key development environment, more resources can be dedicated to value-added application and user-interface development instead of building deployment infrastructure. We will compare an application example hand-coded in ‘C’ to that to one using the Model-Based Design approach. In both cases, the application will be deployed on an embedded ARM11 Linux platform using the Xenomai real-time extension.

Through the last number of years we have seen the emergence of static and dynamic analysis techniques as accepted methods of increasing embedded software quality, security, and reliability. We will look at various static analysis techniques (standards compliance, complexity analysis, run-time error analysis) and dynamic analysis techniques (functional, system and unit test, structural coverage analysis, modeling) and show how applying the results of both static and dynamic analysis provides far more value than either one alone. Key to this increased value is traceability: the ability to apply results of these various analysis techniques to requirements at both high and low levels throughout the development lifecycle creates actionable status data usable by management to assess embedded software projects. Finally, we will look at methods of automating the various analyses and establishing the traceability of analysis results at various phases within the development lifecycle.

At 400+ pages, the new VITA 65 OpenVPX standard can be a bit daunting. VITA 65’s total of fifteen 6U backplane profiles, fourteen 6U module profiles, thirteen 3U backplane profiles, and twenty-two 3U module profiles seems like a lot of choices to make. The good news is that it’s not as complex a task as it appears to be. This seminar will provide hands-on guidance for navigating the new standard, selecting appropriate backplane profiles, and matching up compatible modules and backplanes. The backplane topology will often be selected based on the application requirements, and different backplane topologies are best suited to different types of applications.

There are many strategies a project can take to test their embedded software applications. These include code coverage analysis, full unit testing, and static code analysis. Ideally, most organizations would like a repeatable regression testing process that is easy to implement and has a measurable impact on product quality. But how do you get there? This session will explore the various ways companies from a wide range of industries combine various testing approaches to improve overall product quality and test repeatability. A comprehensive live demonstration on an embedded target will highlight how VectorCAST, the industry-leading embedded software testing tool, addresses unit testing, integration testing, code coverage analysis, system testing and regression testing.

Come hear about the future of Embedded Solutions, featuring Intel's Embedded processor family and Insyde Software's award winning firmware and support services. Intel will explore the technical merits of its microprocessors solutions and fully discuss which ones may be appropriate for the listener’s design & development requirement while Insyde will discuss and provide technical training in order to help you get the most out your current or future bios projects. Also, we will have a Drawing for an Intel/Insyde enabled HP Netbook, so be sure to Enter the Drawing at the Seminar for a chance to win (must attend seminar to enter Netbook drawing).

This is an Advanced Session for those who attended the earlier session: "Jumpstart Your Windows Embedded Standard 7 Project: Tips for quickly developing and deploying your device", or anyone that is comfortable using a development tool, or has some Microsoft product knowledge.

FAA DO-178B safety critical applications must follow rigorous software processes. CERT-C is a secure coding standard published by Software Engineering Institute, Carnegie Mellon. See how to obtain DO-178B static analysis credit using automated static analysis tools and how to comply with the static analyzable rule in the CERT-C standard.

In this presentation, you will will learn more about the underlying benefits of the newly submitted Open VPX specification. As the US government mandates a move to more open solutions and away from closed proprietary solutions, Open VPX can meet these needs. In addition to added scalability and flexibility the new specification helps to reduce risk and costs. The specification improves interoperability at the board level to reduce customization and cost. Learn more about OpenVPX from one of the people who worked on the Open VPX Industry Working Group to develop this industry-changing specification.

Software engineers know real-time performance and safety often hinge on effective embedded code. Developing such software means rethinking fundamental programming concepts to eliminate the possibility of bottlenecks and failure. Memory management is one such key concept. This seminar delivers memory management techniques to optimize code for performance and reliability. Its practical, hands-on advice and examples range from alternatives to dynamic memory allocation, to the role of highly efficient custom memory allocators for specific program tasks.

Learn how you can take your algorithms developed in MATLAB and Simulink and implement them in real-time on ARM processors running Embedded Linux. We will use a 3-Band a parametric equalizer model as an example that can be tuned through a MATLAB GUI. Through integration with Eclipse IDE and GNU toolchain, we’ll show code generation and implementation of this parametric equalizer on the ARM Cortex A-8 processor inside the Beagleboard.

This special seminar will outline the steps required to configure a standard Linux desktop system for cross development using an example embedded Linux distribution. This initial set up, including the exportation of a file system for the embedded target, requires care to ensure that the embedded tool chain does contaminate the host tool chain. This "how-to" discussion is targeted at familiarizing the audience with the effort required before embarking on an embedded Linux project.

While next generation systems are taking advantage of the latest board-level standards such as VXS and OpenVPX, a wide range of deployed systems are still using VME based architectures. Find out exactly how our QuiXilica products, based on VXS and VME standards, can be used to insert the latest Virtex 6 FPGAs and ultra wide band A/Ds into existing systems, adding extreme performance without the cost or risk of a total system redesign. Learn more about how VXS and VME interoperate and what options are available today for open standard upgrades to existing systems.

Join us as we present the next generation WILDSTAR-Virtex-6 FPGA platforms. Learn exactly how Virtex-6 platforms and integrated FPGA development tools provide system designers with simpler and smarter methodologies for creating FPGA-based DSP solutions. See why these platforms leverage open standards, common design methodologies, development tools, and run-time environments. This seminar will demonstrate how WILDSTAR 6 platforms enable system designers to spend less time developing the infrastructure of their application and more time building differentiating features into their products. Advantages of VPX, uTCA, PCIe, and IBM Blade form factors will be discussed and how they get deployed into various real-time processing applications.

In order to address a growing variety of threats, SIGINT systems must monitor more of the frequency spectrum – this means a need to sample and process multiple channels of sensor data in the MHz and GHz range.

Direct Attached (PCI Express over cable) computing is a powerful technology that can be implemented in almost any application to expand slot count, attach high speed devices to an existing system, and communicate between PC’s at up to 80Gb/s and much less cost than other solutions. Discover how these easily accessible and available products can be implemented in your application for higher productivity at lower costs. See the future of cluster computing using PCIe over cable in the data center and in HPC environments.

With each new generation of powerful, high-performance embedded solutions –including processors with higher clock rates and wider buses, data converter products with higher sampling rates, and FPGAs, RISCs, and DSPs offering incredible computational rates – an equally capable solution was needed to eliminate system bottlenecks and keep pace with faster data transfer rates. Advantages of VPX and its simultaneous accommodation of multiple protocals will be described. In addition, some beamforming application examples will be discussed including direction finding, radar receivers, missile detection and countermeasures and spatial frequency sharing.

Learn how you can generate readable and portable C code from your MATLAB algorithms. Using MATLAB Coder, you can generate standalone C code to implement your MATLAB algorithms as libraries or executable for a PC, or generate customizable and portable C code that can be integrated into existing embedded projects. You can also automatically generate MEX functions that can be used for accelerating parts of your algorithms in MATLAB. We will demonstrate a workflow using a 3-Band parametric equalizer algorithm in MATLAB that is converted to C code and implemented on a Beagleboard to process real-time audio fed through the on-board peripherals while the filter is tuned through a MATLAB GUI communicating with the running application via Ethernet.

Attention Design Engineers! Attend this session to learn how you can get years of battery life and take advantage of existing Wi-Fi access points to deliver low-cost, reliable and secure wireless sensor network products. During this session you will get hands-on experience with: -RFM’s battery-powered 802.11 Wi-Fi RF Module – the WSN802G; -Getting a Wi-Fi network up and running in minutes using the RFM WSN802GDK developer kit; -A live wireless sensor networking demonstration for a temperature monitoring application. The WSN802G features RFM’s industry-leading module platform combined with the GainSpan GS1011 SoC. By sleeping while maintaining access point association, the RFM WSN802G module wakes up periodically, or on interrupts and automatically transmits sensor data in mere milliseconds. No gateways are needed. And with the routines built-in to the module, plus the analog and I/O, no other processor is needed to implement a versatile, easy-to-use wireless sensor.

This is an in-depth introduction to EtherCAT, the fastest industrial Ethernet fieldbus available, capable of updating 1000 distributed I/O in 30µs, 200 16 bit analog I/O in 50µs, or 100 servo axes in 100µs. Learn how its small footprint, low overhead, and open nature make it ideal for embedded applications, custom controls manufacturers, and device developers. See why EtherCAT sets new standards for real-time performance and topology flexibility, while meeting or undercutting standard industrial fieldbus cost levels. Features include IEEE 802.3 compatibility, high precision device synchronization, a cable redundancy option, flexible topology, fiber optic or Cat5 cabling options, and a native functional safety protocol (SIL3). EtherCAT is an international standard (IEC, ISO and SEMI).

Algorithm and systems design engineers use Simulink for modeling real-time controls applications, and look to implement these algorithms in DSPs and FPGAs. For FPGA design, systems designers need to consider issues related to fixed-point modeling, area-speed-power trade-offs, verifying HDL code, and selecting the right FPGA. In this talk, we will describe an automated workflow that addresses these topics and significantly reduces FPGA design cycle time.

As the use of OpenVPX in military applications increases, issues such as thermal management and system level integration have received considerable attention. With the high-speed serial data transfer rates and increased volume of traffic afforded by the OpenVPX platform, the amount of heat created is exponentially greater than VME and PCI, and must be removed to ensure peak system function. Yet open air cooling is often too loud, and can render the benefits of a small form factor deployed in-field virtually moot. Engineers must therefore utilize targeted air flow techniques (to increase flow rates without amplifying noise) to remove the heat from the system enclosure. In order to achieve this as efficiently as possible, the path between heat sources within the system and the outside surfaces should be as thin as possible to avoid any transferal to cards. We will review innovative cooling techniques for VPX systems and present a more efficient design for complex thermal management.

Embedded systems are evolving quickly with sophisticated human machine interfaces that combine audio/video playback, enhanced graphics, and internet connectivity. This session looks at building advanced HMIs and all the challenges that come with it. Learn how to integrate advanced graphical tooling into an embedded environment, addressing the two most commonly raised objections: adequate performance and rock-solid reliability. Explore engineering concerns about integrating everything from high-level HMI applications to low-level embedded controls without compromising real-time reliability or HMI performance. Finally, discover how to save time in the integration process by creating a seamless interface, blending content from any number of existing applications.

Embedded Linux development teams assemble custom Linux distributions for each device they produce. The processes of building, maintaining, and re-using custom distributions requires infrastructure that is usually built and maintained by the development teams. In addition, how distributions are made available is changing. Source based distributions are now more common and provide greater flexibility in building a custom distribution. In recent years, open-source standards have emerged that have helped streamline and drive this process. Built on these standards, the MontaVista Integration Platform provides a flexible approach to embedded Linux development, using a source based approach and giving developers greater control. In this session, learn the differences between binary and source-based development approaches, and how to transition to source-based development using the MontaVista Integration Platform and open source standards.

ARM Cortex-M processor-based devices are being integrated into many complex and safety-critical environments, requiring higher levels of software optimization and certification. Join us today and we will show how modern Debug and Trace units, combined with the advanced capabilities of the ARM CoreSight debug technology, deliver real-time debug, profiling, and code coverage solutions for all embedded applications.